Certess offers a unique functional verification solution that helps engineers evaluate and improve the completeness of the verification environment for each design block and IP. The result is that resources are allocated to maximize quality and reduce the time to integrate SoC designs. The results of Certess' product, Certitude, are greatly enhanced by the Novas debug system. This includes the automated waveform dumping, the automated detection of differences in waveforms and the exploration process to map those differences to the design content.