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Novas Software is the leading provider of solutions that enhance verification of complex ICs, embedded systems and SoCs. Novas solutions work with simulators to provide debug automation and visibility enhancement. The Novas award-winning Verdi™ Debug Automation and Siloti™ Visibility Enhancement solutions cut debug time in half and transform verification methodologies to accelerate the ability of engineers to comprehend and correct design problems. As a result, design teams spend less time figuring out the behavior of their designs and more time adding value.
Novas Enhances Verification Two Ways
Debug Automation - Cuts Debug Time in Half
Novas user surveys confirm verification consumes up to 50% of the engineering effort on a typical large-scale IC project, and that debug is at least half of that time. This makes debug one of the most time-consuming elements of the entire design process. Design teams would prefer to use the time and resources doing more creative tasks or reducing the overall design and verification process. Novas directly addresses this issue with time-saving debug automation technology and solutions.
Verdi Automated Debug System
The Verdi Automated Debug System provides an advanced system for debugging your digital designs. It cuts debug time by more than 50% (typically) through sophisticated algorithms and features that:
- Automate behavior tracing with patented behavior analysis technology, eliminating the need to manually trace signal activity line-by-line or gate-by-gate
- Extract, isolate, and display pertinent logic in flexible and powerful design views
- Reveal the operation and interaction between the design, assertions, and testbench
The Novas debug automation technology works at every step of the verification flow to provide a unified environment for:
- RTL and gate-level debug to automatically trace causal logic over many cycles
- Assertion and testbench visualization to seamlessly debug designs, testbenches, and assertions
- System-level debug to work at a higher level of abstraction
- Design implementation analysis to analyze and debug critical timing, signal integrity, and timing issues
The Verdi Automated Debug System further unifies the debug process by supporting all the popular verification tools and design/verification languages.
Visibility Enhancement - Eliminates Verification Overhead
It is amazing to think that today's designs are so large and complex they can create more value changes in a tenth of millisecond of simulation time than there are stars in the Milky Way galaxy. Recording enough of these signal values to gain visibility into design behavior comes at a significant cost to verification overhead. Recording all signal values creates huge unmanageable data files while dumping no data or partial data can result in an unpredictable number of simulation iterations. The visibility enhancement approach pioneered by Novas enables engineers to achieve full observability with minimal impact on verification.
Siloti Visibility Enhancement Solution
The Novas Siloti Visibility Enhancement product improves full-chip simulation and emulation, first-silicon prototype, and silicon debug methodologies by minimizing the cost of obtaining the data necessary to understand complex design behavior. The Siloti product significantly reduces the number of simulation iterations while also dramatically reducing data file sizes. The patent-pending technology in the Siloti solution enables designers to:
- Analyze the design to determine the minimal set of essential signals (typically 5 to 20%) required for full visibility
- Expand the limited essential signal data using formal techniques to compute values for the remaining design signals as needed
- Correlate the dumped gate-level signals back to the familiar RTL representation
The Siloti product is tightly integrated with the Novas Verdi Automated Debug System to bring RTL debug to visibility-challenged environments.
Novas Platform Unifies Complex Verification Environments
In addition to automating discrete tasks, Novas provides a common platform for unifying multiple languages, tools and methodologies througout the entire verification flow. Novas supports all the popular verification and assertion languages across system, RTL and gate levels down to the silicon. Novas rapidly evolves its technology platform to include advanced verification techniques such as testbench automation, transaction-level modeling, and hardware-based verification.
The Novas platform is based on an open architecture with application programming interfaces that allow Novas products to be integrated into third party and proprietary verification environments. Novas works with over 60 design and verification tool developers, IP vendors and service providers to ensure that designers have access to the most robust and interoperable ecosystem of verification enhancement solutions.
Commitment to Excellence
Novas employs worldwide research and development, sales and support teams with offices in the US, Europe, and Asia. Novas solutions are deployed all over the world by over 400 companies. Customer applications include microprocessors, specialized processors, networking, telecommunications and graphics chips. Novas has achieved the number 1 ranking in customer satisfaction for 5 consecutive years in a comprehensive EDA study by CMP Media and has received numerous awards for its innovative Verdi and Siloti solutions.
Summary
As IC designs become larger and more complex, verification and debug consume more time and resources. Novas solutions address this bottleneck directly by cutting debug time in half and minimizing simulation overhead. The Verdi Automated Debug System and the Siloti Visibility Enhancement Solution deliver unique technologies in highly useable products that interoperate with simulation and other verification products to speed up verification and give engineers more time to add value to their designs, their companies, and their lives.