Press Release
Date: February 24th, 2003
Source: Novas
Novas Joins Language Standards Group Accellera
Focus On Facilitating Advanced Verification Methods a Key Strategy for Debug Leader
Augmenting traditional hardware description language (HDL)-based simulation and debug, new assertion-based verification and related transaction-based techniques can be used to verify designs and their testbenches at the system level. The latest version of the SystemVerilog standard approved by Accellera extends Verilog HDL to support architectural and behavioral design and system verification with assertions.
"Novas has established itself as a leader in debug for complex IC and SoC design. We welcome their contributions and continued support in the development of formats that truly meet the requirements for system-level verification," said Accellera chairman Dennis Brophy. "With the implementation of emerging standards into practical solutions by industry leaders like Novas, we believe Accellera's work with assertions and SystemVerilog will be the catalyst for next-generation IC and SoC design."
"The work Accellera is doing is extremely important for advancing design and verification methodologies. Our customers depend on us to deliver advanced debug and design understanding solutions that track with the latest design representation formats and techniques," said Scott Sandler, president and CEO of Novas. "As part of Accellera, we can stay close to these efforts and work jointly with our partners, customers and competitors in developing standards which are critical to the future success of this industry."
Sandler added, "Our engineers have been involved for more than a year with the Accellera activities. We decided to become a corporate member to derive the benefits that this membership offers and align ourselves to the industry standardization effort around the SystemVerilog initiative."
Accellera is an electronics industry organization that drives the worldwide development and use of standards required by systems, semiconductor and design tool companies that enhance a language-based design automation process This includes support of technical groups involved with developing standards for IEEE 1364 (Verilog HDL) and IEEE 1076 (VHDL). For more information, please visit www.accellera.org. For a list of Accellera-supported activities, visit http://www.accellera.org/subcom.html.
Novas is the pioneer of knowledge-based debug systems that reduce the functional verification costs for complex IC designs. Building upon the strength of its market-leading DebussyŽ Knowledge-Based Debug System, Novas' second-generation Verdi Behavior-Based Debug System further improves the efficiency of designers in the system-on-chip era with advanced design exploration and debug capabilities. These allow design teams to better understand and analyze complex or unfamiliar design behavior, and cuts by half or more the time it takes to locate, isolate and understand the root causes of design problems. There are more than 7,000 Novas systems in use today at customer sites worldwide. Novas is headquartered in San Jose, Calif. with offices in Europe, Japan and Asia-Pacific. For more information visit www.novas.com or send email to info@novas.com
Novas is located at:
2025 Gateway Place, Suite 480
San Jose, CA 95110.
Phone: 408-467-7888
Fax: 408-467-7889
1-888-NOVAS-38.
CONTACT:
Laurie Stanley
Public Relations for Novas
Wired Island, Ltd.
(510) 656-0999
laurie@wiredislandpr.comLorie Bowlby
Director, Marketing Communications
Novas Software, Inc.
(408) 467-7871
lorie@novas.com
