Press Release
Date: May 27th, 2003
Source: Novas
Novas Announces Support for SystemVerilog
Industry-leading Debug Solutions Debussy and Verdi to Support Emerging Standard for Next-Generation Design Language
San Jose,
Calif., May
27, 2003 — Novas Software, Inc., the leader in debug
systems for complex chip designs, today announced product support
for SystemVerilog, the Accellera standard based on the popular
Verilog hardware description language (HDL). Designers using
SystemVerilog will be able to leverage the advanced tracing and
analysis capabilities of Novas debug systems to quickly locate,
isolate and understand the root causes of design errors.
SystemVerilog
allows designers to work at higher levels of abstraction for
greater efficiency in designing and verifying complex chips,
especially large system-on-chip (SoC) designs. Debussy®
(Novas’ structure-based debug system) is the first debug
system to support the SystemVerilog 3.0 specification as
standardized by the Accellera industry group. Novas is currently
beta testing Debussy with SystemVerilog with a leading
semiconductor company for general release in the second half of
2003. Novas’ Verdi
Ô
Behavior-Based
Debug System will support SystemVerilog by building on the
foundation layer developed for Debussy.
“It’s critical that our debug solutions support the design formats and techniques that engineers need to work at all levels of abstraction. SystemVerilog has emerged as a new way to improve the efficiency of design and verification,” said Scott Sandler, president and CEO of Novas. “At Novas, we’re doing more than just supporting the concept. We’ve already shipped an early version to a major customer, and are committed to having robust product support available as market adoption accelerates.”
Leading Industry Support
Designers
will be able to use Debussy and Verdi with SystemVerilog in much
the same way they debug Verilog or VHDL designs today. The debug
systems will allow engineers to read in results generated by
SystemVerilog-based logic simulators, and use the full range of
Novas’ integrated tracing and visualization tools including
waveforms, schematics, state diagrams, and temporal flow diagrams
to quickly track down bugs and map them to the actual
SystemVerilog source code. Novas will also tightly integrate with
third-party SystemVerilog-based tools, such as Synopsys’
VCS® simulator as well as other popular simulators.
“Synopsys has
pledged its full support of the SystemVerilog language across its
design and verification platforms, enabling a comprehensive design-for-verification
methodology to help design teams streamline and reduce SoC
verification effort,” said Farhad Hayat, vice president of
marketing, Verification Technology Group at Synopsys
(Nasdaq:SNPS). “Novas’ support of SystemVerilog and
integration with VCS further strengthen the
design-for-verification methodology.”
Novas is
an active participant in SystemVerilog standardization efforts,
as well as the continuing enhancement of the language. Support
for the SystemVerilog 3.1 specification, which adds testbench and
assertion support to the language among other capabilities, will
be offered in subsequent releases of the Novas debug systems once
it is standardized.
“Today’s announcement by Novas is an exciting milestone for SoC verification, and the adoption of standards needed to support it,” said Accellera chairman Dennis Brophy. “Getting the results of Accellera’s efforts out into verification environments and in the hands of engineers for their next-generation IC and SoC design starts is the ultimate goal. We applaud Novas’ commitment to implementing SystemVerilog in their own debug solutions and their collaboration with Synopsys and other tool vendors to ensure interoperability throughout the workflow.”
About Novas
Novas is the pioneer of debug systems that reduce the functional verification costs for complex IC designs. Building upon the strength of its market-leading Debussy® Debug System, Novas’ Verdi Ô Behavior-Based Debug System further improves the efficiency of designers in the system-on-chip era with advanced design exploration and debug capabilities. These allow design teams to better understand and analyze complex or unfamiliar design behavior, and cut by half or more the time it takes to locate, isolate and understand the root causes of design problems. Highlighted as one of the “Top 100 Products” for 2002 by EDN Magazine, Verdi also holds the honor as finalist for the EDN 2002 Innovation Award.
There are more than 10,000 Novas systems in use today at customer sites worldwide. Novas is headquartered in San Jose, Calif. with offices in Europe, Japan and Asia-Pacific. For more information visit www.novas.com or send email to info@novas.com