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Verdi Automated Debug

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The Verdi™ Automated Debug System is an advanced solution for debugging your digital designs. It provides powerful technology to help you:

• Comprehend complex and unfamiliar design behavior

• Automate difficult and tedious debug processes 

• Unify diverse and complicated design environments

 

 

 

Increase Design Productivity

Verdi lets you focus on tasks that add more value to your designs by cutting your debug time, typically by over 50%. Verdi's technology:

  • Automates behavior tracing with its unique behavior analysis technology
  • Extracts, isolates, and displays pertinent logic in flexible and powerful design views
  • Reveals the operation of and interaction between the design, assertions, and testbench

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A Complete Debug System

Verdi is a complete debugging environment that incorporates all of the technology and capability of Novas' renowned Debussy® Debug System and adds advanced debugging features as well as support for a broad range of languages and methodologies.

Standard Features:

  • Waveforms - Full-featured waveform package supports traditional display and analysis of activity over time
  • Waveform Comparison Engine - Powerful comparison engine isolates differences between two Fast Signal Database (FSDB) files
  • Source code browser - Active source code display provides easy traversal of source and hierarchy
  • Schematics - Flexible schematics and block diagrams display logic and connectivity using familiar symbols
  • State machine diagrams - Intuitive bubble diagrams reveal the operation of finite state machines

Advanced Features:

  • Automatic tracing of signal activity - Powerful behavior analysis technology reduces manual tracing of activity across many clock cycles
  • Temporal flow views - Combined display of time and structure provides rapid understanding of cause/effect relationships
  • Assertion-based debug - Integrated support for assertions enables quick traversal from assertion failure to related design activity
  • Testbench debug - Specialized support for automated testbench environments provides seamless tracing of cause/effect across the design/testbench boundary
  • Transaction-based debug - Flexible transaction support - provided via the nTX extension to Verdi - enables debug and analysis at higher levels of abstraction

Languages and Methodologies:

  • Design components described in Verilog, VHDL, and SystemVerilog
  • Automated testbench environments using e and SystemVerilog Testbench (SVTB) [Note. SVTB is currently in beta.] 
  • Assertions using PSL and SystemVerilog Assertions (SVA)

 

An Optimized and Open Architecture

Verdi is built on the Novas Design Knowledge Architecture that consists of compilers that extract relevant information into databases that are optimized for efficient debug:

  • Knowledge Engine Compilers: Extract design knowledge contained in HDL code, testbenches, and assertions
  • Knowledge Database™ (KDB): Stores crucial design knowledge that facilitates debug and understanding
  • Fast Signal Database (FSDB): Captures and stores results from simulators, emulators, and formal tools that produce time/value sequences
  • A set of Application Programming Interfaces (APIs): Provides open access to both databases and command-and-control mechanisms, enabling easy integration with verification tools and design environments.

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