Press Release
Date: August 28th, 2006
Source: Novas
Novas Launches 2006 User Conference Program
Top-ranked EDA Vendor for Customer Satisfaction Reinforces Commitment
to Helping Novas Users Optimize their Verification and Debug Process
SAN JOSE, Calif., August 28, 2006 - Novas Software, Inc., the leader in debug systems for complex chip designs, today announced its 2006 International User Conference program. This fifth annual series is comprised of technical tutorials featuring Novas' award-winning debug and visibility enhancement products, state-of-the-art verification methodologies, and helpful user hints and tips. The events will be held in nine locations in North America and Europe, and are free of charge for both current customers and those evaluating Novas products:
September 12 Beaverton, OR
September 19 Santa Clara, CA
September 21 Austin, TX
September 26 Chandler, AZ
September 28 Irvine, CA
October 12 San Jose, CA
October 24 Westford, MA
October 26 Ottawa (Kanata), Ontario, Canada
November 7 Munich, Germany
Users have ranked Novas number one in customer satisfaction for the fifth consecutive year in the 2006 Electronic Design Automation Tool Users Survey conducted by EE Times, part of CMP Technology LLC. The open forum format of these conferences underscores Novas' commitment to making customers the top priority and keeping them abreast of the latest technologies and methodologies to maximize their productivity.
Robust Technical Program
The 2006 User Conference program focuses on "Optimizing the Verification and Debug Process" with demonstrations of practical solutions that can be immediately adopted to improve efficiency from systems to silicon. The full-day agenda covers a range of topics, including:
· Automating SystemVerilog Assertion Debug
· Eliminating Verification Overhead and Enabling Silicon Debug
· Making Transaction-based Analysis Accessible to HDL Designers
· Bridging the Gap Between Design and Implementation: Clock Analysis with Novas Tools
· Hints and Tips for Using Novas Debug Tools More Efficiently
The events are structured to provide users with the ability to meet other users and exchange best practices for real-life debug scenarios. Novas executives and technical experts will also be on hand to discuss and provide guidance on users' verification and debug challenges.
A detailed agenda is available at: /novasUCs2006.html. Seating is limited, so attendees are encouraged to pre-register at: /.docs/pg/uc_novas_registration.html
Award-Winning Product Showcase
Technical sessions will showcase Novas' flagship Verdi™ Automated Debug System and its new family of Siloti™ Visibility Enhancement products that transform late-stage verification and system validation methodologies by removing the barriers that impair visibility into design behavior. The Siloti product family was named 2006 product of the year by Electronique magazine and presented with an inaugural "Cool Beans" award by SOCcentral at the 43rd Design Automation Conference in July 2006.
"What a simple, elegant, yet incredibly powerful concept … I think that this is mega-cool technology that is going to be a "must have" for many designers. So I'm delighted to sing their praises and award the chaps and chappesses at Novas a brand-spanking new "Cool Beans" award." (SOCcentral, March 29, 2006, Cool Beans posting by Clive Maxfield)
About Novas
Novas Software, Inc. is the leading provider of design comprehension solutions for engineers designing complex ICs, embedded systems and SoCs. Novas' Verdi automated debug and Siloti visibility enhancement products dramatically accelerate the process for understanding and correcting design problems starting from system-level specification through silicon implementation. Novas is headquartered in San Jose, Calif. with offices in Europe, Japan and Asia-Pacific. For more information, visit www.novas.com or email info@novas.com.